Field of Invention
Embodiments of the invention relate generally to pattern-recognition processors and, more specifically, in certain embodiments, to reducing power consumption of such pattern-recognition processors.
Description of Related Art
In the field of computing, pattern recognition tasks are increasingly challenging. Ever larger volumes of data are transmitted between computers, and the number of patterns that users wish to identify is increasing. For example, spam or malware are often detected by searching for patterns in a data stream, e.g., particular phrases or pieces of code. The number of patterns increases with the variety of spam and malware, as new patterns may be implemented to search for new variants. Searching a data stream for each of these patterns can form a computing bottleneck. Often, as the data stream is received, it is searched for each pattern, one at a time. The delay before the system is ready to search the next portion of the data stream increases with the number of patterns. Thus, pattern recognition may slow the receipt of data.
Such pattern-recognition devices may use all or almost all of the memory core available for the pattern-recognition process. That is, due to the nature of searching each data stream for one or more patterns, all or almost all of the memory core may be accessed during each processing cycle. This may result in high power consumption by the pattern recognition processer. Additionally, address-decoding techniques used with conventional DRAM devices or other memories may be unsuitable for use by a pattern-recognition device.